Akım kontrollu taşıyıcı ve kapasite elemanları kullanarak istenilen gerilim transfer fonksiyonunun bilgisayar yardımı ile sağlanması
Başlık çevirisi mevcut değil.
- Tez No: 75426
- Danışmanlar: PROF. DR. FUAT ANDAY
- Tez Türü: Yüksek Lisans
- Konular: Elektrik ve Elektronik Mühendisliği, Electrical and Electronics Engineering
- Anahtar Kelimeler: Akım taşıyıcı devreler, Bilgisayar destekli tasarım, Gerilim, Kapasite kullanımı, Current conveyor circuits, Computer aided design, Voltage, Capacity utilization
- Yıl: 1998
- Dil: Türkçe
- Üniversite: İstanbul Teknik Üniversitesi
- Enstitü: Fen Bilimleri Enstitüsü
- Ana Bilim Dalı: Elektronik ve Haberleşme Mühendisliği Ana Bilim Dalı
- Bilim Dalı: Elektronik ve Haberleşme Mühendisliği Bilim Dalı
- Sayfa Sayısı: Belirtilmemiş.
Özet
Bu tez çalışmasında elde edilmesine çalışılan devrede, iki adet akım kontrollü taşıyıcı kullanılmış, bu taşıyıcıların bacakları arasına tüm olasılıklar göz önüne alınmak üzere kapasite elemanları bağlanmıştır. Buna göre verilen bir gerilim transfer fonksiyonunu gerçekleyen devre yapısını veya yapılarını arayarak bulan bir program geliştirilmiştir. Programda kullanılan yöntem, ele alınan eleman kombinasyonunun düğüm denklemlerinden bir A matrisi oluşturmakta ve bu matris yardımı ile A.Vj=b,{V| = 1,2,..., 6} eşitliğini çözerek, istenilen transfer fonksiyonunu bulmaktadır. Programa devre elemanları sembolik olarak girilmekte, ancak devrenin transfer fonksiyonu belirlendikten sonra verilen transfer fonksiyonu ile uyumluluk sağlayan eleman değerleri sayısal olarak programca verilmektedir. Program IBM PC uyumlu bilgisayarlar için Windows95 işletim sistemi altında geliştirilmiş olup, programlama dili olarak MATHEMATİCA 3.0.2 kullanılmıştır.
Özet (Çeviri)
Since their introduction in 1970, the second generation current conveyors (CCII) have led to a great number of applications in the various designs of analogue electronics, like amplifiers, filters or more generally signal processing circuits. Among all these realizations, only two types are of interest for a monolithic integration of the circuit. The difference between them is in the implementation of the input cell that behaves as a voltage follower (ports X and Y of the circuit). When this input cell is obtained from an operational amplifier (OPAMP), used in a voltage follower configuration, the conveyor benefits, at low frequency, of a low output parasitic resistance on port X. When the input cell is implemented from a mixed translinear loop composed of complementary bipolar transistors, the conveyor is characterized by an excellent frequency response for the voltage transfer from port Y to port X. The mixed translinear loop, shown in Fig.1, contains two PNP's and two NPN's transistors. b(t) \ Q2 Ix(t) B 4 *- OUTPUT / \ Q4 l4(t) Fig.l Schematic form of the mixed translinear loopIt is characterized by the translinear relationship between collector currents of these transistors: İ1-İ3 = İ2-U (1) This circuit is dc biased by two identical currents (U = l3 = l0l by assuming current gains p of the transistors much greater than unity). Thus, it presents a high impedance input port (point A) and a low impedance output port (point B). This circuit is a voltage follower. The voltage difference between points A and B depends on the value of the current ix(t); its expression is given by VBA(t) = -VT.log^ (2) io where VT = 26 mV at 27°C is the thermal voltage. The relationship (1) allows, in the particular case of the loop shown in the Fig.1 to calculate the expressions for the currents l2(t) and l4(t). They are given by i2(t)=i.[ft2(0 + 4/2)^-^(0] 0) i4(t)=i.[ft2(o+4/:^+^(o] (4) Now, by assuming the magnitude of the current ix(t) much smaller than 2I0, (2) and (3) lead to VBA(t)=^ix(t) (5) This relationship shows that the output small signal resistance of the equivalent voltage follower, is equal to Rx = *%/“. So, it will be able to controlled by acting on the bias current l0of the loop. The schematic implementation of the second generation controlled conveyor ith a positive current transfer from X to Z (CCCII+) is shown in Fig.2. It uses the preceding mixed translinear loop of Fig.1. The high impedance input port (point A) has been called Y. Port X corresponds to point B. Two current mirrors (transistors Qg.Qio and Qn to Q13) allow the mixed loop to be dc biased by the current l0. Output Z, that copies the current flowing through port X, is realized in a conventional manner, using two complementary mirrors. Fig.3 represents the electrical symbol of the CCCII+. IXv+ Q10 Io( i N Q13 A K Q9 N Qi iy(t) Y~»- Vv(t) Q3 A N Q12 Q8 A K Q7 V Q2 İx(t) -« - X K Q4 Vx(t) V N Qll Q5 İz(t) ¦< - z V Q6 Fig.2 Current controlled conveyor (CCCII4) iy(t) vy(t) ho CCCII+ Y Z X İz(t) 1 1 I ^İx(t) jVx(t) Fig.3 CCCH+'s associated symbol Vzft) The notations of the input-output ports: X, Y, Z are those generally used for current conveyors. The matrix relationship can be written using the conventional variables, also valid for the CCCII+, taking into account its intrinsic resistance Rx.(6) A current controlled conveyor with negative current transfer (CCCII”) will be obtained easily, by only adding two cross-coupled current mirrors in order to reverse the sign of the current iz(t). So (6) is also valid for the CCCII" just by reversing the signs of the non-null coefficients of the last line of the two matrixes ( as fc/k= -1). In chapter 3, we discuss the digital computational techniques of linear networks. Gaussian and Gauss-Jordan are the most commonly used methods. It is shown that the number of operations are the same in the above two methods. In the Gaussian Elimination Algorithm, the procedure starts by normalizing the first equation by dividing each of its coefficients by an. Next, this first equation is multiplied by the leading coefficients an of each of the other equations and is subtracted from each successive equation. The result will be the elimination of the first variable from all equations except the first. Next, using the last n-1 equations and the same procedure, the second variable is eliminated from the last n-2 equations. The procedure is repeated until after n stages the triangular form is complete. This procedure is shown mathematically in this chapter. After triangular form, if we go on with the procedure for the upper part we will get the unit matrix. The left hand side will be the solution vector. This procedure is called the Gauss-Jordan method. In chapter 4, we explain method which solve nonlinear resistive networks. Newton-Raphson method is discussed in this chapter. In this method, the derivative is needed at all points, but it converges much more rapidly than the method of Fixed-Point. The choice of methods depends on the particular function f{x) or F{x). In chapter 5, the methods of symbolic analysis will be discussed. The definition of symbolic analysis will be given and the methods of symbolic analysis which is used in program will be explained. In chapter 6, the structure of the program which has been developed, Mathematica 3.0.2 and, example circuits will be explained.
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