Akım taşıyıcı eleman kullanılarak SC aktif filtre tasarımı
Başlık çevirisi mevcut değil.
- Tez No: 75202
- Danışmanlar: PROF. DR. ALİ NUR GÖNÜLEREN
- Tez Türü: Yüksek Lisans
- Konular: Elektrik ve Elektronik Mühendisliği, Electrical and Electronics Engineering
- Anahtar Kelimeler: Aktif filtreler, Akım taşıyıcı devreler, Filtreler, Active filters, Current conveyor circuits, Filters
- Yıl: 1998
- Dil: Türkçe
- Üniversite: İstanbul Teknik Üniversitesi
- Enstitü: Fen Bilimleri Enstitüsü
- Ana Bilim Dalı: Elektronik ve Haberleşme Mühendisliği Ana Bilim Dalı
- Bilim Dalı: Elektronik ve Haberleşme Mühendisliği Bilim Dalı
- Sayfa Sayısı: Belirtilmemiş.
Özet
ÖZET Bu tez çalışmasının amacı, bugüne kadar işlemsel kuvvetlendirici kullanılarak tasarlanan SC aktif filtre devrelerini, ikinci kuşak akım taşıyıcı eleman ( CCII ) ile tasarlamaktır. Genel ikinci derece z domeni transfer fonksiyonunun öncelikle işaret akış diyagramı elde edilmiştir. Akım taşıyıcı toplama devresi ve bu devrenin işaret akış diyagramı baz alınarak, elde edilen işaret akış diyagramından akım taşıyıcı içeren SC aktif filtrenin devre topolojisine geçilmiştir. Bu geçiş, işaret akış diyagramının dal kazançlarının mutlak değerleri devredeki kapasite değerlerini; işaret akış diyagramının dal kazançlarının işaretleri de akım taşıyıcıların akım kazançlarını belirleyecek şekilde yapılmıştır. Elde edilen bu devre özelleştirilerek alçak geçiren, yüksek geçiren, band geçiren ve notch tipi filtrelerin devre topolojileri çıkartılmış ve devrede yer alan elemanların değerleri, ilgili fonksiyonun katsayıları cinsinden belirlenmiştir. Ayrıca bu devrelerin kararlılık koşulları ve duyarlılık fonksiyonları incelenmiştir. Bu biçimde elde edilen CCII-SC aktif filtre tasarımını bilgisayar ortamına aktarmak için C dilinde bir bilgisayar programı hazırlanmıştır. Bu program dijital karakteristikleri girilen alçak, yüksek, band geçiren filtrelerin transfer fonksiyonunu hesaplamaktadır. Daha sonra bu fonksiyonun katsayılarına göre eleman değerlerini bulmaktadır. Bulduğu bu değerleri devrenin dinamik aralığını ve devrede yer alacak minimum kapasite değerini dikkate alarak normalize etmektedir. Ayrıca transfer fonksiyonun frekans karakteristiğini de çizmektedir. Son olarak birkaç filtre tasarımı hazırlanmış ve son bölümde örnek olarak sunulmuştur. Hazırlanan bu örnekler spice simülasyon programı yardımıyla analiz edilmişlerdir. Analiz sırasında kullanılan devreler ideal akım taşıyıcı ve ideal anahtar içerir. Analiz sonucunda tasarlanan filtrelerin istenen frekans karakteristiklerini sağladıkları görülmüştür. xı
Özet (Çeviri)
DESIGN OF SWITCHED CAPACITOR ACTIVE FILTER USING CURRENT CONVEYOR The system given in figure 1 shows the analog signal being passed through a continuous anti-aliasing filter, an input sample-and-hold circuit (S/H) which samples the band-limited analog input at intervals of l/fci » the switched capacitor filter, an output sample-and-hold circuit (S/H)0 which resamples the output of the SC filter at intervals l/fCN, and a final continuous reconstruction filter which serves to smooth the sharp transitions in the sampled-data waveform. out T2 Figure 1 Sampled-data filter system for analog input and smooth analog output The SC filter is shown to be controlled by clocks of multiple frequencies (fC2 through fcN-0- To minimize the silicon area, it is often desirable to clock the low- pass sections at a high rate in order to lesson the burden on the continuous anti aliasing filter, and to clock the high-pass sections at a lower rate, in order to reduce their total capacitance. Since the low-pass sections, sampled at fC2, precede the high- pass sections which are sampled at fC3<fC2,the low-pass sections provide the needed anti-aliasing protection up to fC2/2. It is noted that decreasing the sampling rate, typically requires no additional circuitry. However, increasing the sampling rate is a smoothing operation which typically requires additional low-pass filtering. When the input or output is interfaced with digital or sampled-data circuitry, such as D/A or A/D converters, some of this hardware is no longer needed. For example, when the output is to be interfaced with a digital environment, the continuous reconstruction filter is no longer needed and the sampled-data circuit is typically incorporated with the digital circuitry. Although the needed for filtering is reduced, interfacing with digital or sampled-data circuits requires synchronization between the clocks that control the SC filter and those that control the external sampling operations. This is accomplished by passing synchronization pulses between the SC xnnetwork and external samplers. One reason for the synchronization is to ensure that the SC network output is sampled after all transients have settled and the output is truly held constant. Consider the operation of an ideal SC network, comprised of ideal capacitors, ideal switches, and ideal voltage-controlled voltage sources etc. when excited by sampled-data voltage inputs. Typically, the switches are controlled by a two-phases, nonoverlapping clock of frequency fc= T/2. Note that Oe is used to denote the even clock phase, which instantaneously closes the e switch on the even 2nT times. Similary, O0 denotes the odd clock phase, which instantaneously closes the o switch on the odd (2n+l)T times. The switches are assumed to have 50% duty cycle with equal (T second) on and off time periods. As the clock rate increase, the capacitor ratio, hence the silicon area, increases. Therefore, in practice the clock rate is typically chosen no higher than is requiered to achieve the desired degree of anti-aliasing protection with a second-order continuous filter of suffieciently high cutoff frequency to render its main passband variation acceptably small. The 50% duty cycle assumption is merely for simplification. The behavior of switched capacitor filters is strongly dependent on the clock period and typically is insensitive to the duty cycle. In fact, in practice, to ensure that the e and o switches are never turned on simultaneously, the clocks are made nonoverlapping. It is noted that turning both the Oe and <&° switches off simultaneously does not affect the behavior of the circuit; however, turning both switches on will cause improper circuit function. The input or output of the SC network are sampled-data signals which change in value only at the switching instants kT. Thus, in their most general from, the voltage source and the internal circuit voltage are assumed to be sampled at times kT and held over a one-half clock period interval(T). With this assumption, we can apply z- transform techniques to the general analysis and synthesis of SC network. The z- transform, z = e ST, where s is the complex analog frequency variable and x = 2T is the clock period, then provides us with a convenient means for performing frequency-domain analysis. Therefore the z-transform will exactly indicate the input-output relationship of an SC filter. To restore analog character to z-transform frequency response, this response must be modified multiplicative (sinc»r/2)/(ûyr/2), where x is the sampling period. For high sampling rates, where ayc«l, the passband of the frequency response is left virtually uneffected. The switching action provides a time-varying nature to the SC network. That this is an output observed will depend upon when, and how often, the output is sampled. The SC networks are separated two different topology as the switches open and closed. One topology corresponds to the even clock phase and a second topology to the odd clock phase. One way to interpret the relationship between the even and the odd topologies is to consider them topologically decoupled, with the states of one determining the initial conditions for the other. This interpretation results in two distinct circuits coupled together via dependent sources which establish the aforementioned initial conditions. This formulation has been found to be particularly convenient for computer-aided analysis. Another interpretation is to combine the even and odd networks topologically into a single z-domain equivalent circuit. In general, an n- port bi-phase SC network will require a 2n-port. xniSince SC networks can be most rigorously characterized in terms of charge- transfer operations, discrete-time voltages Vj(kT) and discrete-time charge variations or transfers Aqi(kT) are used as port variables. At the switching times, kT, charges are instantaneously redistributed, with the principle of charge conservation maintained at every node in the network. It is this principle that allow us to write nodal charge equations similar to the way Kirchhoff s current law is used in continuous network. In general, due to the biphase switching operation, two distinct, but coupled, nodel charge equations are required to characterize the charge conservation condition at a particular node for all times instants, kT; one equation for the even sampling instants and a second equation for the odd sampling instants are required. These equations are written, for some node p, as follows : Mep Mep AqeP(kT)=Xqpi(kT)-£qp\[(k-l)r] ; for k an even integer (la) i=l i=l Mop Mop Aq;(kT)=£qpi(kT)-£qepi[(k-1)T] i for kan odd integer (lb) or equivalents in the z-domain, Mep Mep AQep(z)=£Q;i(z)-z-“2£Q;i(Z) (2a) Mop Mop aq°(z)=Sq0Pİ(z)-z-”2£q;İ(z) (2b) where q^, q^ and Q^, Q^ denote, respectively, the instantaneous charges stored on the ith capacitor connected to node p for the even and odd kT time instants and their z-transforms. Also Mep and Mop denote, respectively, the total number of capacitors connected to the node p during the even and odd clock phases. The initial step in the synthesis of an SC network is to obtain an appropriate z- domain transfer function. Since filters are typically specified by frequency-domain requirements, it is convenient to have a mathematical expression that allows us to transform rational s-domain transfer functions to rational z-domain transfer function. To be generally useful, such an expression should, in addition, possess two qualities : 1. Stable s-domain transfer functions map into stable z-domain transfer functions. 2. The imaginary j co-axis of the s-plane map onto the unit circle of z-plane. There are four transformation which have been used to synthesis SC network. These are back forward difference, forward difference, bilinear, lossless discrete integrator. The suitable transformation to convert s-domain transfer functions to z- domain transfer functions is bilinear transform. Using z domain admittances of the basic SC building blocks, active SC filters which realize z-domain voltage transfer function, by using current conveyors and switched-capacitor, are projected. The synthesis method is based on drawing signal- xivflow graph from the given transfer function and obtaining the circuit realization from the graph. (a) V, o V2 1+Y3 (b) Figure 2 (a) CCII subnetwork (b) Associated subgraph Consider the subnetwork shown in figure 2(a). Using the defining equation for the current conveyor, it can be shown that the subgraph in figure 2(b) corresponds to the subnetwork in figure 2(a). The z-domain equivalent admittances of the three basic SC elements can be obtained as shown in table 1. xvTable 1 Basic SC building blocks and the z domain admittance Circuit realization Z domeni admittances o e l-h o e -ir s* -o V iv Cz1 zh C C(l-z') If a given z-domain transfer function can be represented by a suitable signal flow graph composed of subgraphs of the form of figure 2(b), the corresponding circuit realization can be easily found by the aid figure 2 and table 1. xviout (b) Figure 3 Realization of 2th-order voltage transfer function The realization of the 2th-order transfer function is considered. This transfer function T(z) = ao+aiz~1+a2z~2 W l + b,z-'+b2z-2 (3) can be represented by a signal-flow graph by using mason's gain formula as in figure 3(a). The circuit realization of this graph can be obtained as shown figure 3(b), with the aid of figure 2 and table 1. xvii
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